1. Field of the Invention
This invention relates to integrated circuit packaging technology, and more particularly, to a method of fabricating a FCBGA (Flip-Chip Ball-Grid-Array, or called Flip-Chip Chip-Scale-Package, FCCSP) package without causing mold flash.
2. Description of Related Art
BGA (Ball Grid Array) is an advanced type of integrated circuit packing technology which is characterized by the use of a substrate whose front side is mounted with a semiconductor chip and whose back side is mounted with a grid array of solder balls. During SMT (Surface Mount Technology) process, the BGA package can be mechanically bonded and electrically coupled to a printed circuit board (PCB) by means of these solder balls.
FCBGA (Flip-Chip Ball-Grid-Array) is a more advanced type of BGA technology which is characterized by a semiconductor chip mounted in an upside-down (i.e. flip chip) manner over the substrate and bonded to the same by means of a plurality of solder bumps attached to the I/O pads thereon. Since no bonding wires are required, the FCBGA package can be made very small in size to the chip scale. For this reason, it is also referred to as Flip-Chip Chip-Scale-Package (FCCSP) technology.
As the flip chip is readily bonded in position over the substrate, however, an undergap would be undesirably left between the flip chip and the substrate. If this flip-chip undergap is not underfilled, it would easily cause the flip chip to suffer from fatigue cracking and electrical failure due to thermal stress when the entire package structure is being subjected to high-temperature conditions. As a solution to this problem it is an essential step in flip-chip package fabrication to fill up the flip-chip undergap with an electrically-insulative material into the flip-chip undergap. The underfilled material, when hardened, can serve as a mechanical reinforcement for the flip chip to cope against thermal stress.
Conventionally, there are many methods that can be used to perform the above-mentioned flip-chip underfill process. One method is the molded-underfill process, which can fill the flip-chip undergap incidentally through the molding process to fabricate the required encapsulation body (or called molded compound). One example of the molded-underfill process is depicted in the following with reference to FIGS. 1A-1D (note that FIGS. 1A-1D are simplified schematic diagrams showing only the pats related to the invention; the actual layout on the FCBGA package may be much more complex).
FIG. 1A is a schematic sectional diagram showing a semi-finished FCBGA package assembly before molding. As shown, the semi-finished FCBGA package assembly includes: (a) a substrate 110 having a front surface 110a and a back surface 110b; (b) a semiconductor chip 120 mounted in an upside-down (i.e., flip chip) manner by means of a plurality of solder bumps 121 over the front surface 110a of the substrate 110; (c) an array of solder-ball pads 130 formed over the back surface 110b of the substrate 110, which are used for subsequent attachment of an array of solder balls (shown in FIG. 1D with the reference numeral 160) thereon; and (d) a solder mask 140 which covers all the back surface 110b of the substrate 110 while exposing the solder-ball pads 130.
One drawback to the conventional solder-mask fabrication process, however, is that it would make the resulted solder mask 140 to include a bulged portion 140a over the rim of the solder-ball pads 130 and a recessed portion 140b over other areas. The depth of the recessed portion 140b (i.e., the distance between the topmost surface of the bulged portion 140a and the bottom most surface of the recessed portion 140b) is typically 10 xcexcm (micrometer).
As the semiconductor chip 120 is readily mounted in position over the substrate 110, however, a flip-chip undergap 120a would be undesirably left between the semiconductor chip 120 and the substrate 110. If this flip-chip undergap 120a is not underfilled, it would easily cause the semiconductor chip 120 to suffer from fatigue cracking and electrical failure due to thermal stress when the entire package structure is being subjected to high temperature conditions. One solution to this problem is molded-underfill.
To facilitate the molded-underfill process, it is required to drill a vent hole 111 through the substrate 110 and the solder mask 140 at the central point of the area where the semiconductor chip 120 is mounted. The vent hole 111 has an entrance in the front surface 110a of the substrate 110 and an exit in the recessed portion 140b of the solder mask 140.
Referring further to FIG. 1B, in the next step, a molding process is performed by fixing the semi-finished FCBGA package assembly in a molding tool 170 having an injection inlet 171; and then, an encapsulation material, such as epoxy resin, is injected through the injection inlet 171 into the molding tool 170 to thereby form a molded compound, or called encapsulation body 150, to encapsulate the semiconductor chip 120.
During the forgoing molding process, the encapsulation material will also infiltrate into the flip-chip undergap 120a. Owing to the provision of the vent hole 111, the air in the flip-chip undergap 120a can escape to the outside atmosphere, thus allowing the encapsulation material to infiltrate without air resistance into the entire flip-chip undergap 120a and thereby form a molded underfill layer 122 between the semiconductor chip 120 and the substrate 110.
One problem to the foregoing molded-underfill process, however, is that the encapsulation material would fisher infiltrate all the way through the vent hole 111 to the recessed portion 140b of the solder mask 140 (the marching path is indicated by the arrows in FIG. 1B); and after filling up the recessed portion 140b of the solder mask 140, the encapsulation material would further infiltrate tough the seam between the molding tool 170 and the bulged portion 140a of the solder mask 140 to the nearby solder-ball pads 130, thus causing mold flash 151 over the solder-ball pads 130.
As illustrated in FIG. 1C, since the encapsulation material is electrically-insulative, the mold flash 151 over the solder mask 140 and the solder-ball pads 130 would degrade the quality of the outer appearance of the resulted package.
Referring further to FIG. 1D, in the next step, a ball grid array 160, i.e., an area of solder balls, are attached to the solder-ball pads 130. Since mold flash 151 is left over the solder-ball pads 130, it would degrade the electrical bonding between the solder-ball pads 130 and the ball grid array 160, thus adversely affecting the reliability of the operation of the encapsulated semiconductor chip 120.
Related patents, include, for example, the U.S. Pat. No. 6,038,136 entitled xe2x80x9cCHIP PACKAGE WITH MOLDED UNDERFILLxe2x80x9d. This patent discloses a FCBGA package tat is underfilled through molded underfill process. The utilization of this patent, however, still has the above-mentioned problem of mold flash.
It is therefore an objective of this invention to provide a method for fabricating a FCBGA package with molded underfill, which can help to prevent mold flash over exposed surface of the resulted package through the vent hole, so as to assure the quality of the outer appearance of the resulted package.
It is another objective of this invention to provide a method for fabricating a FCBGA package with molded underfill, which can help to prevent mold flashover exposed surface of the resulted package, so as to assure the quality of the bonding between the solder-ball pads and the solder balls attached thereon.
In accordance with the foregoing and other objectives, the invention proposes an improved method for fabricating a FCBGA package.
Broadly recited, the method of the invention comprises the following steps. (1) preparing a substrate having a front surface and a back surface; the substrate being predefined with a vent-hole position at a specified location; (2) forming a plurality of solder-ball pads and a dummy pad over the back surface of the substrate, the dummy pad being located at the predefined vent-hole position; (3) forming a solder mask over the back surface of the substrate to cover all the back surface of the substrate including the dummy pad while exposing the solder-ball pads; wherein the portion of the solder mask that is laid over the dummy pad is allowed to be formed into an elevated flat surface; (4) drilling through the predefined vent-hole position to thereby form a vent hole having an entrance in the front surface of the substrate and an exit in the elevated flat surface of the solder mask; (5) forming a groove in the elevated flat surface and surrounding the exit of the vent hole, (6) mounting a flip chip over the front surface of the substrate, wherein a flip-chip undergap is left between the flip chip and the substrate; and (7) performing a molding process to form an encapsulation body through the use of an encapsulation material to encapsulate the flip chip; wherein the vent hole allows the air in the flip-chip undergap to escape t outside atmosphere, thereby allowing the encapsulation material to infiltrate with air resistance into the flip-chip undergap and form a molded-underfill layer; and wherein as the encapsulation material flows to the exit of the vent hole and infiltrates to the groove, the encapsulation material would be contained within the groove, thereby preventing the encapsulation material from flashing to the solder-ball, pads.
Since there would substantially exist no mold flash over the exposed surface of the solder mask and the solder-ball pads, the invention allows the resulted FCBGA package to be assured in the quality of its outer appearance and the quality of the electrical bonding between the solder-ball pads and the subsequently attached solder balls thereon to make the encapsulated semiconductor chip reliable to use during operation.